The present invention relates to an interface circuit arranged between an input/output (to be referred to as an I/O hereinafter) circuit and a system bus and, more particularly, to an interface circuit for assigning a common I/O port address to a plurality of I/O circuits.
An expansion interface other than an internal interface is arranged in a system having a microcomputer. Various I/O devices (e.g., a process I/O device and an expansion external memory) are arranged in an expansion unit.
In general, when a microcomputer controls such optional I/O expansion devices, a specific I/O of a specific circuit (e.g., data register and status register) must be accessed from the computer side. For this purpose, the I/Os are assigned to corresponding main memory locations. Alternatively, the I/Os are assigned to corresponding I/O ports. According to the former technique, a specific I/O is connected to an address bus of the microcomputer, and the microcomputer supplies specific address data and a memory write/read signal (MEM R/W) to the I/O side. The I/O side decodes the address data and supplies the decoded signal and the MEM R/W signal to a specific internal circuit. As a result, the microcomputer can exchange data with the specific internal circuit on the I/O side. However, this technique has a disadvantage in that the main memory area is occupied to a degree corresponding to the number of I/Os. Recently, the capacity of such microcomputers has been increased and the area for the address locations has been increased. However, the capacity of programs such as an operating system (OS) and word processing control programs has also tended to increase. Therefore, when a large user area is assumed, I/O allocation with respect to the address locations is limited, resulting in inconvenience.
A technique for assigning I/Os to corresponding I/O ports has been proposed to solve the above problem. According to this technique, an I/O is connected to part (e.g., the lower 8 bits of a 16-bit address bus) of the address bus. In this case, the microcomputer generates an I/O port address and an I/O signal (I/O IN/OUT). The I/O decodes the I/O port address and supplies the decoded signal and the I/O IN/OUT signal to a specific internal circuit. Then, the microcomputer can exchange data with the internal circuit in the I/O. In this case, the address locations of the I/O are independent of the main memory area.
In microcomputer systems, the processing capacity in a variety of applications is increasing. Along with this, the number of I/O devices is increasing. System designers and manufacturers are introducing systems having a minimum number of required I/Os. These systems then offer options for expanding the number of I/Os as required for a variety of applications, through an expansion interface.
In order to control these options (generally, expansion boards) by the microcomputer, specific I/O port address must be assigned to the optional boards. However, the number of I/O port addresses of the microprocessor is limited, so that the I/O ports to be assigned run out, and a common I/O port must be assigned to different I/O options. When different I/O options have a common I/O port address, the user cannot use these I/O options together.
In addition to this disadvantage, an interrupt request line between an I/O option and the microprocessor is required for connection of this optional I/O. An ID status is required to cause the control program to determine which I/O sends an interrupt request. Therefore, in order to expand the I/O architecture, the interrupt request line and the ID status are also preferably expandable.
Microcomputer controlled systems (in particular, personal computers) tend to be mutually compatible (software and I/O devices are commonly used between different systems). Therefore, compatibility of the optional I/Os becomes the significant problem to be solved.